1. Field of the Invention
The present invention relates to semiconductor devices and, in particular, to a semiconductor device that combines a vertical-channel trench-substrate field effect device with a Metal-Oxide-Silicon Field Effect Transistor (MOSFET) structure and to a method for its manufacture.
2. Description of the Related Art
The performance of MOSFET devices (for example, their speed and power consumption) can be affected by the level of substrate current exiting the MOSFET device. For example, the snapback voltage and/or holding voltage of a conventional N-channel MOSFET ESD device, under high drain and gate bias conditions, can be degraded by substrate current (made up of carriers, i.e. holes, generated through impact ionization) exiting the channel region of the N-channel MOSFET device and flowing to a semiconductor substrate underlying the N-channel MOSFET device.
The use of Silicon-On-Insulator (SOI) technology provides for a MOSFET device to be electrically isolated from an underlying semiconductor substrate by an insulating layer. See S. Wolf, Silicon Processing for the VLSI Era, Volume 2--Process Integration, 66-75, Lattice Press (1990). Although SOI technology can suppress the level of substrate current exiting a MOSFET device, it does not provide a means for independently and controllably tuning the level of substrate current, and hence the performance, of a MOSFET device.
Still needed in the field, therefore, is a semiconductor device that provides a means for independently and controllably tuning the substrate current, and hence the performance, of a MOSFET device. Also needed is a process for manufacturing such a semiconductor device that is compatible with conventional integrated circuit (IC) processing techniques.